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顯示 1 到 7 筆資料，總共 7 筆
公開日期標題作者
1-四月-1998Back-gate bias enhanced band-to-band tunneling leakage in scaled MOSFET'sChen, MJ; Huang, HT; Hou, CS; Yang, KN; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-1996A design strategy for short gate length SOI MESFETsHou, CS; Wu, CY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2002Impact of a large earthquake on a GPS network: The case of the 1999 Chi-Chi, Taiwan earthquakeKuo, LC; Yu, SB; Hsu, VJ; Hou, CS; Lee, YH; Tsai, CS; Chen, CS; 土木工程學系; Department of Civil Engineering
1-四月-2000Monte Carlo sphere model for effective oxide thinning induced extrinsic breakdownHuang, HT; Chen, MJ; Chen, JH; Su, CW; Hou, CS; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-1999A novel cross-coupled inter-poly-oxide capacitor for mixed-mode CMOS processesChen, MJ; Hou, CS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-1998A physical model for the correlation between holding voltage and holding current in epitaxial CMOS latch-upChen, MJ; Lee, HS; Chen, JH; Hou, CS; Lin, CS; Jou, YN; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2001A trap generation closed-form statistical model for intrinsic oxide breakdownHuang, HT; Chen, MJ; Su, CW; Chen, JH; Hou, CS; Liang, MS; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 1 到 7 筆資料，總共 7 筆