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公開日期標題作者
2008Characteristics of poly-Si nanowire transistors with multiple-gate configurationsHsu, Hsing-Hui; Lin, Homg-Chih; Lee, Ko-Hui; Huang, Jian-Fu; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2008Fabrication and Characterization of Multiple-Gated Poly-Si Nanowire Thin-Film Transistors and Impacts of Multiple-Gate Structures on Device FluctuationsHsu, Hsing-Hui; Liu, Ta-Wei; Chan, Leng; Lin, Chuan-Ding; Huang, Tiao-Yuan; Lin, Horng-Chih; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2011Impacts of Multiple-Gated Configuration on the Characteristics of Poly-Si Nanowire SONOS DevicesHsu, Hsing-Hui; Lin, Horng-Chih; Luo, Cheng-Wei; Su, Chun-Jung; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2011Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory DevicesLuo, Cheng-Wei; Lin, Horng-Chih; Lee, Ko-Hui; Chen, Wei-Chen; Hsu, Hsing-Hui; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2008A novel multiple-gate polycrystalline silicon nanowire transistor featuring an inverse-T gateLin, Horng-Chih; Hsu, Hsing-Hui; Su, Chun-Jung; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2009Origin of hysteresis in current-voltage characteristics of polycrystalline silicon thin-film transistorsLin, Horng-Chih; Hung, Cheng-Hsiung; Chen, Wei-Chen; Lin, Zer-Ming; Hsu, Hsing-Hui; Hunag, Tiao-Yuang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2010Origins of Performance Enhancement in Independent Double-Gated Poly-Si Nanowire DevicesHsu, Hsing-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2009Performance Improvement of Polycrystalline Silicon Nanowire Thin-Film Transistors by a High-k Capping LayerLee, Ko-Hui; Hsu, Hsing-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
22-四月-2010Suspended nanochannel transistor structure and method for fabricating the sameLin, Horng-Chin; Su, Chun-Jung; Hsu, Hsing-Hui; Li, Guan-Jang
1-三月-2009Threshold-Voltage Fluctuation of Double-Gated Poly-Si Nanowire Field-Effect TransistorHsu, Hsing-Hui; Lin, Horng-Chih; Chan, Leng; Huang, Tiao-Yuan; 電子工程學系及電子研究所; 奈米中心; Department of Electronics Engineering and Institute of Electronics; Nano Facility Center
2008Tr-gate Poly-Si Thin-Film Transistor with Nanowire ChannelsHsu, Hsing-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009Tri-gated Poly-Si Nanowire SONOS DevicesHsu, Hsing-Hui; Liu, Ta-Wei; Lin, Chuan-Ding; Chia Kuo-Jung; Huang, Tiao-Yuan; Lin, Horng-Chih; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2010Trigated Poly-Si Nanowire SONOS Devices for Flat-Panel ApplicationsLin, Horng-Chih; Liu, Ta-Wei; Hsu, Hsing-Hui; Lin, Chuan-Ding; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2011新穎多閘極多晶矽奈米線薄膜電晶體之研製與其應用徐行徽; Hsu, Hsing-Hui; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子研究所