瀏覽 的方式: 作者 Lee, CL

跳到: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字:  
顯示 1 到 20 筆資料,總共 124 筆  下一頁 >
公開日期標題作者
2005Adaptive encoding scheme for test volume/time reduction in SoC scan testingLin, SP; Lee, CL; Chen, JE; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2002Analysis of application of the IDDQ technique to the deep sub-micron VLSI testingLu, CW; Lee, CL; Su, CC; Chen, JE; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-1999Applications of total reflection X-ray fluorescence to analysis of VLSI micro contaminationLiou, BW; Lee, CL; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-1998Argon ion-implantation on polysilicon or amorphous-silicon for boron penetration suppression in p(+) pMOSFETLee, LS; Lee, CL; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
15-六月-1996AuGePt ohmic contact to n-type InPHuang, WC; Lee, CL; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
15-六月-1996AuGePt ohmic contact to n-type InPHuang, WC; Lee, CL; 電子工程學系及電子研究所; 電控工程研究所; Department of Electronics Engineering and Institute of Electronics; Institute of Electrical and Control Engineering
1-九月-2000A behavior-level fault model for the closed-loop operational amplifierChang, YJ; Lee, CL; Chen, JE; Su, CC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
18-七月-2002BIST scheme for DAC testingChang, SJ; Lee, CL; Chen, JE; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2004Carrier transportation of rapid thermal annealed CeO2 gate dielectricsWang, JC; Chiang, KC; Lei, TF; Lee, CL; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2004Characteristics improvement and carrier transportation of CeO2 gate dielectrics with rapid thermal annealingWang, JC; Chiang, KC; Lei, TF; Lee, CL; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2000Characteristics of high breakdown voltage Schottky barrier diodes using p(+)-polycrystalline-silicon diffused-guard-ringLiou, BW; Lee, CL; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十月-1996Characteristics of top-gate polysilicon thin-film transistors fabricated on fluorine-implanted and crystallized amorphous silicon filmsYang, CK; Lei, TF; Lee, CL; 交大名義發表; 電子工程學系及電子研究所; National Chiao Tung University; Department of Electronics Engineering and Institute of Electronics
1-一月-2003Characteristics of vertical thermal/PECVD polysilicon oxides formed on the sidewall of polysilicon filmsLee, MZ; Chang, YA; Lee, CL; Lei, TF; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十月-2003Characterization of temperature dependence for HfO2 gate dielectrics treated in NH3 plasmaWang, JC; Shie, DC; Lei, TF; Lee, CL; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-1996Characterization of thin textured tunnel oxide prepared by thermal oxidation of thin polysilicon film on siliconWu, SL; Chiao, DM; Lee, CL; Lei, TF; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2005A cocktail approach on random access scan toward low power and high efficiency testLin, SP; Lee, CL; Chen, JE; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-1999A compiled-code parallel pattern logic simulator with inertial delay modelHuang, KC; Lee, CL; Chen, JE; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-1998Correlation of stress-induced leakage current with generated positive trapped charges for ultrathin gate oxideLin, YH; Lee, CL; Lei, TF; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-1998Correlation of stress-induced leakage current with generated positive trapped charges for ultrathin gate oxideLin, YH; Lee, CL; Lei, TF; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2005Crosstalk fault detection for interconnection lines based on path delay inertia principleWu, MS; Lee, CL; Chang, YJ; Wu, WC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics