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顯示 1 到 11 筆資料，總共 11 筆
公開日期標題作者
2008Characteristics of poly-Si nanowire transistors with multiple-gate configurationsHsu, Hsing-Hui; Lin, Homg-Chih; Lee, Ko-Hui; Huang, Jian-Fu; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2014Fabrication of High-Performance Poly-Si Thin-Film Transistors With Sub-Lithographic Channel DimensionsLee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2014Fabrication of tri-gated junctionless poly-Si transistors with I-line based lithographyLin, Cheng-I; Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電機工程學系; Department of Electrical and Computer Engineering
1-四月-2014Gate-all-around floating-gate memory device with triangular poly-Si nanowire channelsTsai, Jung-Ruey; Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-七月-2011Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory DevicesLuo, Cheng-Wei; Lin, Horng-Chih; Lee, Ko-Hui; Chen, Wei-Chen; Hsu, Hsing-Hui; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
7-十月-2013Low-voltage high-speed programming/erasing floating-gate memory device with gate-all-around polycrystalline silicon nanowireLee, Ko-Hui; Tsai, Jung-Ruey; Chang, Ruey-Dar; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2013A Novel Charge-Trapping-Type Memory With Gate-All-Around Poly-Si Nanowire and HfAlO Trapping LayerLee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2014Novel gate-all-around polycrystalline silicon nanowire memory device with HfAlO charge-trapping layerLee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2013Novel Method for Fabrication of Tri-Gated Poly-Si Nanowire Field-Effect Transistors With Sublithographic Channel DimensionsLee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2009Performance Improvement of Polycrystalline Silicon Nanowire Thin-Film Transistors by a High-k Capping LayerLee, Ko-Hui; Hsu, Hsing-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013新穎多晶矽奈米線非揮發性記憶體之研製與分析李克慧; Lee, Ko-Hui; 林鴻志; 黃調元; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系 電子研究所
顯示 1 到 11 筆資料，總共 11 筆