1. 目前位置：

瀏覽 的方式： 作者 Lin, Chang-Hsien

跳到： 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字：  
顯示 1 到 8 筆資料，總共 8 筆
公開日期標題作者
2013Estimating the Detection Stability of a Si Nanowire Sensor Using an Additional Charging ElectrodeChen, Min-Cheng; Chen, Hsiao-Chien; Lee, Ta-Hsien; Lin, Yu-Hsien; Shih, Jyun-Hung; Wang, Bo-Wei; Hou, Yun-Fang; Chen, Yi-Ju; Lin, Chia-Yi; Lin, Chang-Hsien; Hsieh, Yi-Ping; Ho, ChiaHua; Hua, Mu-Yi; Qiu, Jian-Tai; Wang, Tahui; Yang, Fu-Liang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2016First Fully Functionalized Monolithic 3D(+) IoT Chip with 0.5 V Light-electricity Power Management, 6.8 GHz Wireless-communication VCO, and 4-layer Vertical ReRAMHsueh, Fu-Kuo; Shen, Chang-Hong; Shieh, Jia-Min; Li, Kai-Shin; Chen, Hsiu-Chih; Huang, Wen-Hsien; Wang, Hsing-Hsiang; Yang, Chih-Chao; Hsieh, Tung-Ying; Lin, Chang-Hsien; Chen, Bo-Yuan; Shiao, Yu-Shao; Huang, Guo-Wei; Wong, Oi-Ying; Chen, Po-Hung; Yeh, Wen-Kuan; 電子工程學系及電子研究所; 生醫電子轉譯研究中心; Department of Electronics Engineering and Institute of Electronics; Biomedical Electronics Translational Research Center
2014Hybrid Si/TMD 2D Electronic Double Channels Fabricated Using Solid CVD Few-Layer-MoS2 Stacking for V-th Matching and CMOS-Compatible 3DFETsChen, Min-Cheng; Lin, Chia-Yi; Li, Kai-Hsin; Li, Lain-Jong; Chen, Chang-Hsiao; Chuang, Cheng-Hao; Lee, Ming-Dao; Chen, Yi-Ju; Hou, Yun-Fang; Lin, Chang-Hsien; Chen, Chun-Chi; Wu, Bo-Wei; Wu, Cheng-San; Yang, Ivy; Lee, Yao-Jen; Yeh, Wen-Kuan; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2016MOS2 U-shape MOSFET with 10 nm Channel Length and Poly-Si Source/Drain Serving as Seed for Full Wafer CVD MOS2 AvailabilityLi, Kai-Shin; Wu, Bo-Wei; Li, Lain-Jong; Li, Ming-Yang; Cheng, Chia-Chin Kevin; Hsu, Cho-Lun; Lin, Chang-Hsien; Chen, Yi-Ju; Chen, Chun-Chi; Wu, Chien-Ting; Chen, Min-Cheng; Shieh, Jia-Min; Yeh, Wen-Kuan; Chueh, Yu-Lun; Yang, Fu-Liang; Hu, Chenming; 材料科學與工程學系; Department of Materials Science and Engineering
1-一月-2016A Numerical Study of Si-TMD Contact with n/p Type Operation and Interface Barrier Reduction for Sub-5 nm Monolayer MoS2 FETTang, Ying-Tsan; Li, Kai-Shin; Li, Lain-Jong; Li, Ming-Yang; Lin, Chang-Hsien; Chen, Yi-Ju; Chen, Chun-Chi; Su, Chuan-Jung; Wu, Bo-Wei; Wu, Cheng-San; Chen, Min-Cheng; Shieh, Jia-Min; Yeh, Wen-Kuan; Su, Po-Cheng; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming; 電機工程學系; Department of Electrical and Computer Engineering
1-四月-2012Random Telegraph Noise in 1X-nm CMOS Silicide Contacts and a Method to Extract Trap DensityChen, Min-Cheng; Lin, Chia-Yi; Chen, Bo-Yuan; Lin, Chang-Hsien; Huang, Guo-Wei; Ho, Chia-Hua; Wang, Tahui; Hu, Chenming; Yang, Fu-Liang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2011Silicide Barrier Engineering Induced Random Telegraph Noise in 1Xnm CMOS ContactsChen, Min-Cheng; Lin, Chia-Yi; Chen, Bo-Yuan; Lin, Chang-Hsien; Huang, Guo-Wei; Huang, Chien-Chao; Ho, ChiaHua; Wang, Tahui; Hu, Chenming; Yang, Fu-Liang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015TMD FinFET with 4 nm Thin Body and Back Gate Control for Future Low Power TechnologyChen, Min-Cheng; Li, Kai-Shin; Li, Lain-Jong; Lu, Ang-Yu; Li, Ming-Yang; Chang, Yung-Huang; Lin, Chang-Hsien; Chen, Yi-Ju; Hou, Yun-Fang; Chen, Chun-Chi; Wu, Bo-Wei; Wu, Cheng-San; Yang, Ivy; Lee, Yao-Jen; Shieh, Jia-Min; Yeh, Wen-Kuan; Shih, Jyun-Hong; Su, Po-Cheng; Sachid, Angada B.; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming; 電子物理學系; 電子工程學系及電子研究所; Department of Electrophysics; Department of Electronics Engineering and Institute of Electronics
顯示 1 到 8 筆資料，總共 8 筆