瀏覽 的方式: 作者 Lin, Chien-Ching

跳到: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字:  
顯示 1 到 18 筆資料,總共 18 筆
公開日期標題作者
2007A 0.22nJ/b/iter 0.13 mu m turbo decoder chip using inter-block permutation interleaverWong, Cheng-Chi; Tang, Cheng-Hao; Lai, Ming-Wei; Zheng, Yan-Xiu; Lin, Chien-Ching; Chang, Hsie-Chia; Lee, Chen-Yi; Su, Yu-T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2009Design of a Multimode QC-LDPC Decoder Based on Shift-Routing NetworkLiu, Chih-Hao; Lin, Chien-Ching; Yen, Shau-Wei; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; Hsu, Yar-Sun; Jou, Shyh-Jye; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A Long Block Length BCH Decoder for DVB-S2 ApplicationLin, Yi-Min; Wu, Jau-Yet; Lin, Chien-Ching; Chang, Hsie-Chia; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2007A low-power Viterbi decoder based on scarce state transition and variable truncation lengthLin, Dah-Jia; Lin, Chien-Ching; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
6-十二月-2007Method and apparatus for self-compensation on belief-propagation algorithmLiao, Yen-Chin; Lin, Chien-Ching; Chang, Hsie-Chia; Liu, Chih-Wei
21-八月-2008Method and apparatus for switching data in communication systemLee, Chen-Yi; Liu, Chih-Hao; Lin, Chien-Ching; Chang, Hsie-Chia; Hsu, Yar-Sun
21-八月-2008Method and apparatus for switching data in communication systemLee, Chen-Yi; Lu, Jr-Hau; Lin, Chien-Ching; Chang, Hsie-Chia; Hsu, Yar-Sun
11-十二月-2003Method for calculating syndrome polynomial in decoding error correction codesChang, Hsie-Chia; Lee, Chen-Yi; Lin, Chien-Ching
26-十月-2006Method for updating check-node of low-density parity-check (LDPC) codes decoder and device using the sameLee, Chen-Yi; Lin, Chien-Ching; Lin, Kai-Li; Chang, Hsie-Chia
1-四月-2007MLP/BP-based soft decision feedback equalization with bit-interleaved TCM for wireless applicationsHsu, Terng-Ren; Lin, Chien-Ching; Hsu, Terng-Yin; Lee, Chen-Yi; 資訊工程學系; 電子工程學系及電子研究所; Department of Computer Science; Department of Electronics Engineering and Institute of Electronics
2008Multi-mode message passing switch networks applied for QC-LDPC decoderLiu, Chih-Hao; Lin, Chien-Ching; Chang, Hsie-Chia; Lee, Chen-Yi; Hsu, Yarsun; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
11-六月-2009MULTI-MODE MULTI-PARALLELISM DATA EXCHANGE METHOD AND DEVICE THEREOFLIU, Chih-Hao; Lin, Chien-Ching; Lee, Chen-Yi; Chang, Hsie-Chia; Hsu, Yarsun
1-六月-2007Self-compensation technique for simplified belief-propagation algorithmLiao, Yen-Chin; Lin, Chien-Ching; Chang, Hsie-Chia; Liu, Chih-Wei; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2006SoC for COFDM wireless communications: Challenges and opportunitiesLee, Chen-Yi; Liu, Hsuan-Yu; Lin, Chien-Ching; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
19-十月-2006Transmission method combining trellis coded modulation and low-density parity check code and architecture thereofLin, Chien-Ching; Chang, Hsie-Chia `; Lee, Chen-Yi
1-二月-2010Turbo Decoder Using Contention-Free Interleaver and Parallel ArchitectureWong, Cheng-Chi; Lai, Ming-Wei; Lin, Chien-Ching; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2005Universal architectures for Reed-Solomon error-and-erasure decoderChang, Fu-Ke; Lin, Chien-Ching; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2009A Universal VLSI Architecture for ReedSolomon Error-and-Erasure DecodersChang, Hsie-Chia; Lin, Chien-Ching; Chang, Fu-Ke; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics