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顯示 1 到 15 筆資料，總共 15 筆
公開日期標題作者
2008Highly reliable MA BE-SONOS (Metal-Al2O3 bandgap engineered SONOS) using a SiO2 buffer layerLai, Sheng-Chih; Lue, Hang-Ting; Liao, Chien-Wei; Wu, Tai-Bor; Yang, Ming-Jui; Lue, Yi-Hsien; Hsieh, Jung-Yu; Wang, Szu-Yu; Luo, Guang-Li; Chien, Chao-Hsin; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 物理研究所; 奈米中心; Institute of Physics; Nano Facility Center
1-六月-2015Impact of V-pass Interference on Charge-Trapping NAND Flash Memory DevicesHsiao, Yi-Hsuan; Lue, Hang-Ting; Chen, Wei-Chen; Chang, Kuo-Pin; Tsui, Bing-Yue; Hsieh, Kuang-Yeu; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2014Modeling the Impact of Random Grain Boundary Traps on the Electrical Behavior of Vertical Gate 3-D NAND Flash Memory DevicesHsiao, Yi-Hsuan; Lue, Hang-Ting; Chen, Wei-Chen; Chang, Kuo-Pin; Shih, Yen-Hao; Tsui, Bing-Yue; Hsieh, Kuang-Yeu; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2012Modeling the Variability Caused by Random Grain Boundary and Trap-location Induced Asymmetrical Read Behavior for a Tight-pitch Vertical Gate 3D NAND Flash Memory Using Double-Gate Thin-Film Transistor (TFT) DeviceHsiao, Yi-Hsuan; Lue, Hang-Ting; Chen, Wei-Chen; Chen, Chih-Ping; Chang, Kuo-Ping; Shih, Yen-Hao; Tsui, Bing-Yue; Lu, Chih-Yuan; 交大名義發表; National Chiao Tung University
2008An oxide-buffered BE-MANOS charge-trapping device and the role of Al2O3Lai, Sheng-Chih; Lue, Hang-Ting; Liao, Chien-Wei; Huang, Yu-Fong; Yang, Ming-Jui; Lue, Yi-Hsien; Wu, Tai-Bor; Hsieh, Jung-Yu; Wang, Szu-Yu; Hong, Shih-Ping; Hsu, Fang-Hao; Shen, Chih-Yen; Luo, Guang-Li; Chien, Chao-Hsin; Hsieh, Kuan-Yeu; Liu, Rich; Lu, Chih-Yuan; 物理研究所; Institute of Physics
1-四月-2009Pulse-IV Characterization of Charge-Transient Behavior of SONOS-Type Devices With or Without a Thin Tunnel OxideDu, Pei-Ying; Lue, Hang-Ting; Wang, Szu-Yu; Huang, Tiaci-Yuan; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009Reliability Study of MANOS with and without a SiO2 Buffer Layer and BE-MANOS Charge-Trapping NAND Flash DevicesLiao, Chien-Wei; Lai, Sheng-Chih; Lue, Hang-Ting; Yang, Ming-Jui; Shen, Chin-Yen; Lue, Yi-Hsien; Huang, Yu-Fong; Hsieh, Jung-Yu; Wang, Szu-Yu; Luo, Guang-Li; Chien, Chao-Hsin; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 電機學院; College of Electrical and Computer Engineering
2015A Study of Blocking and Tunnel Oxide Engineering on Double-Trapping (DT) BE-SONOS PerformanceLo, Roger; Du, Pei-Ying; Hsu, Tzu-Hsuan; Wu, Chen-Jun; Guo, Jung-Yi; Cheng, Chun-Min; Lue, Hang-Ting; Shih, Yen-Hao; Hou, Tuo-Hung; Hsieh, Kuang-Yeu; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009STUDY OF GATE-INJECTION OPERATED SONOS-TYPE DEVICES USING THE GATE-SENSING AND CHANNEL-SENSING (GSCS) METHODDu, Pei-Ying; Lue, Hang-Ting; Wang, Szu-Yu; Huang, Tiao-Yuan; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2008A study of gate-sensing and channel-sensing (GSCS) transient analysis method - Part II: Study of the intra-nitride behaviors and reliability of SONOS-type devicesDu, Pei-Ying; Lue, Hang-Ting; Wang, Szu-Yu; Huang, Tiao-Yuan; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2007Study of the gate-sensing and channel-sensing transient analysis method for monitoring the charge vertical location of SONOS-type devicesDu, Pei-Ying; Lue, Hang-Ting; Wang, Szu-Yu; Lai, Erh-Kun; Huang, Tiao-Yuan; Hsieh, Kuang-Yeu; Liu, Rich; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2018Study of Thyristor-Mode Dual-Channel NAND Flash DevicesLo, Roger; Lue, Hang-Ting; Chen, Weichen; Du, Pei-Ying; Hsu, Tzu-Hsuan; Hou, Tuo-Hung; Wang, Keh-Chung; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十月-2015Ultra-High Bit Density 3D NAND Flash-Featuring-Assisted Gate OperationHsiao, Yi-Hsuan; Lue, Hang-Ting; Chen, Wei-Chen; Tsui, Bing-Yue; Hsieh, Kuang-Yeu; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015三維快閃記憶體技術及其特殊現象之研究蕭逸璿; Hsiao, Yi-Hsuan; 崔秉鉞; 呂函庭; Tsui, Bing-Yue; Lue, Hang-Ting; 電子工程學系 電子研究所
2008以閘極感應與通道感應方法與脈衝電流電壓技術分析SONOS類型元件中捕捉電荷之特性杜姵瑩; Du, Pei-Ying; 黃調元; 呂函庭; Huang, Tiao-Yuan; Lue, Hang-Ting; 電子研究所
顯示 1 到 15 筆資料，總共 15 筆