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顯示 1 到 7 筆資料，總共 7 筆
公開日期標題作者
1-十月-2018Efficient Implementation of Boolean and Full-Adder Functions With 1T1R RRAMs for Beyond Von Neumann In-Memory ComputingWang, Zhuo-Rui; Li, Yi; Su, Yu-Ting; Zhou, Ya-Xiong; Cheng, Long; Chang, Ting-Chang; Xue, Kan-Hao; Sze, Simon M.; Miao, Xiang-Shui; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
二月-2017Functionally Complete Boolean Logic in 1T1R Resistive Random Access MemoryWang, Zhuo-Rui; Su, Yu-Ting; Li, Yi; Zhou, Ya-Xiong; Chu, Tian-Jian; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Sze, Simon M.; Miao, Xiang-Shui; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2020High-Precision Symmetric Weight Update of Memristor by Gate Voltage Ramping Method for Convolutional Neural Network AcceleratorChen, Jia; Pan, Wen-Qian; Li, Yi; Kuang, Rui; He, Yu-Hui; Lin, Chih-Yang; Duan, Nian; Feng, Gui-Rong; Zheng, Hao-Xuan; Chang, Ting-Chang; Sze, Simon M.; Miao, Xiang-Shui; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2019LiSiOX-Based Analog Memristive Synapse for Neuromorphic ComputingChen, Jia; Lin, Chih-Yang; Li, Yi; Qin, Chao; Lu, Ke; Wang, Jie-Ming; Chen, Chun-Kuei; He, Yu-Hui; Chang, Ting-Chang; Sze, Simon M.; Miao, Xiang-Shui; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
28-五月-2017Nonvolatile reconfigurable sequential logic in a HfO2 resistive random access memory arrayZhou, Ya-Xiong; Li, Yi; Su, Yu-Ting; Wang, Zhuo-Rui; Shih, Ling-Yi; Chang, Ting-Chang; Chang, Kuan-Chang; Long, Shi-Bing; Sze, Simon M.; Miao, Xiang-Shui; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2019Reconfigurable Boolean Logic in Memristive Crossbar: The Principle and ImplementationHu, Si-Yu; Li, Yi; Cheng, Long; Wang, Zhuo-Rui; Chang, Ting-Chang; Sze, Simon M.; Miao, Xiang-Shui; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2018Reducing Forming Voltage by Applying Bipolar Incremental Step Pulse Programming in a 1T1R Structure Resistance Random Access MemoryZheng, Hao-Xuan; Chang, Ting-Chang; Xue, Kan-Hao; Su, Yu-Ting; Wu, Cheng-Hsien; Shih, Chih-Cheng; Tseng, Yi-Ting; Chen, Wen-Chung; Huang, Wei-Chen; Chen, Chun-Kuei; Miao, Xiang-Shui; Sze, Simon M.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 1 到 7 筆資料，總共 7 筆