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公開日期標題作者
1-七月-2019Avalanche Ruggedness Capability and Improvement of 5-V n-Channel Large-Array MOSFET in BCD ProcessNidhi, Karuna; Ker, Ming-Dou; Lee, Jian-Hsing; Huang, Shao-Chang; 交大名義發表; 電子工程學系及電子研究所; National Chiao Tung University; Department of Electronics Engineering and Institute of Electronics
1-七月-2017A CMOS-Process-Compatible Low-Voltage Junction-FET With Adjustable Pinch-Off VoltageNidhi, Karuna; Ker, Ming-Dou; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2020Energy Transformation Between the Inductor and the Power Transistor for the Unclamped Inductive Switching (UIS) TestNidhi, Karuna; Lee, Jian-Hsing; Huang, Shao-Chang; Ker, Ming-Dou; 交大名義發表; 電子工程學系及電子研究所; National Chiao Tung University; Department of Electronics Engineering and Institute of Electronics
1-七月-2018Improving Safe-Operating-Area o f a 5-V n-Channel Large Array MOSFET in a 0.15-mu m BCD ProcessNidhi, Karuna; Ker, Ming-Dou; Lin, Tingyou; Lee, Jian-Hsing; 資訊工程學系; 電子工程學系及電子研究所; Department of Computer Science; Department of Electronics Engineering and Institute of Electronics
1-一月-2019Package and Chip Accelerated Aging Methods for Power MOSFET Reliability EvaluationLin, Tingyou; Su, Chauchin; Hung, Chung-Chih; Nidhi, Karuna; Tu, Chily; Huang, Shao-Chang; 交大名義發表; 電信工程研究所; National Chiao Tung University; Institute of Communications Engineering
顯示 1 到 5 筆資料，總共 5 筆