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顯示 1 到 14 筆資料，總共 14 筆
公開日期標題作者
8-三月-2012ASYMMETRIC VIRTUAL-GROUND SINGLE-ENDED SRAM AND SYSTEM THEREOFJOU Shyh-Jye; Lin Jhih-Yu; Chuang Ching-Te; Tu Ming-Hsien; Tsai Ming-Chien
4-九月-2012Disturb-free static random access memory cellChuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu
2-六月-2011DISTURB-FREE STATIC RANDOM ACCESS MEMORY CELLChuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu
12-八月-2014Oscillato based on a 6T SRAM for measuring the bias temperature instabilityChuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di
29-八月-2013Oscillator based on a 6T SRAM for measuring the Bias Temperature InstabilityChuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di
8-四月-2014Single-ended SRAM with cross-point data-aware write operationJou Shyh-Jye; Lin Jhih-Yu; Chuang Ching-Te; Tu Ming-Hsien; Chiu Yi-Wei
1-八月-2013SINGLE-ENDED SRAM WITH CROSS-POINT DATA-AWARE WRITE OPERATIONJou Shyh-Jye; Lin Jhih-Yu; Chuang Ching-Te; Tu Ming-Hsien; Chiu Yi-Wei
29-八月-2013SRAM based on 6 transistor structure including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistorCHUANG Ching-Te; Jou Shyh-Jye; Hwang Wei; Lin Yi-Wei; Tsai Ming-Chien; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di
16-九月-2014Static memory and memory cell thereofJou Shyh-Jye; Tu Ming-Hsien; Hu Yu-Hao; Chuang Ching-Te; Chiu Yi-Wei
11-六月-2015STATIC MEMORY CELLChuang Ching-Te; Chang Chih-Hao; Chung Chao-Kuei; Lu Chien-Yu; Jou Shyh-Jye; Tu Ming-Hsien
7-十月-2014Static random access memory apparatus and bit-line voltage controller thereofChuang Ching-Te; Lien Nan-Chun; Liao Wei-Nan; Chang Chi-Hsin; Yang Hao-I; Hwang Wei; Tu Ming-Hsien
27-十一月-2012Static random access memory with data controlled power supplyChuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Lin Yung-Wei; Lu Chien-Yu; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Chen Chia-Cheng; Shih Wei-Chiang
12-一月-2012STATIC RANDOM ACCESS MEMORY WITH DATA CONTROLLED POWER SUPPLYChuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Lin Yung-Wei; Lu Chien-Yu; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Chen Chia-Cheng; Shih Wei-Chiang
8-七月-2014Static random access memory with ripple bit lines/search lines for improving current leakage/variation tolerance and density/performanceChuang Ching-Te; Yang Hao-I; Lu Chien-Yu; Chen Chien-Hen; Chang Chi-Shin; Huang Po-Tsang; Lai Shu-Lin; Hwang Wei; Jou Shyh-Jye; Tu Ming-Hsien
顯示 1 到 14 筆資料，總共 14 筆