標題: | ASYMMETRIC VIRTUAL-GROUND SINGLE-ENDED SRAM AND SYSTEM THEREOF |
作者: | JOU Shyh-Jye Lin Jhih-Yu Chuang Ching-Te Tu Ming-Hsien Tsai Ming-Chien |
公開日期: | 8-三月-2012 |
摘要: | The present invention discloses an asymmetric virtual-ground single-ended SRAM and a system thereof, wherein a first inverter is coupled to a high potential and a virtual ground, and wherein the first inverter and a second inverter form a latch loop, and wherein a third inverter is electrically connected with the second inverter, and wherein the third inverter and the second inverter are jointly coupled to the high potential and a ground. A write word line and a read word line control an access transistor and a pass transistor to undertake writing and reading of signals. A plurality of asymmetric virtual-ground single-ended SRAMs forms a memory system. |
官方說明文件#: | G11C011/00 |
URI: | http://hdl.handle.net/11536/105205 |
專利國: | USA |
專利號碼: | 20120057399 |
顯示於類別: | 專利資料 |