1. 目前位置：

瀏覽 的方式： 作者 Wang, Jinn-Shyan

跳到： 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字：  
顯示 1 到 9 筆資料，總共 9 筆
公開日期標題作者
1-一月-2013A 0.48V 0.57nJ/Pixel Video-Recording SoC in 65nm CMOSLin, Tay-Jyi; Chien, Cheng-An; Chang, Pei-Yao; Chen, Ching-Wen; Wang, Po-Hao; Shyu, Ting-Yu; Chou, Chien-Yung; Luo, Shien-Chun; Guo, Jiun-In; Chen, Tien-Fu; Chuang, Gene C. H.; Chu, Yuan-Hua; Cheng, Liang-Chia; Su, Hong-Men; Jou, Chewnpu; Ieong, Meikei; Wu, Cheng-Wen; Wang, Jinn-Shyan; 交大名義發表; National Chiao Tung University
1-一月-2014Adaptive Variable-Latency Cache Management for Low-Voltage CachesYu, Yung-Hui; Wang, Po-Hao; Chen, Tien-Fu; Lin, Tay-Jyi; Wang, Jinn-Shyan; 資訊工程學系; Department of Computer Science
六月-2016Cross-matching caches: Dynamic timing calibration and bit-level timing-failure mask caches to reduce timing discrepancies with low voltage processorsWang, Po-Hao; Tsai, Shang-Jen; Tanjung, Rizal; Lin, Tay-Jyi; Wang, Jinn-Shyan; Chen, Tien-Fu; 資訊工程學系; Department of Computer Science
1-一月-2015Low-Cost Low-Power Droop-Voltage-Aware Delay-Fault-Prevention Designs for DVS CachesChou, Pei-Yuan; Wu, I-Chen; Lin, Jai-Wei; Lin, Xuan-Yu; Chen, Tien-Fu; Lin, Tay-Jyi; Wang, Jinn-Shyan; 資訊工程學系; Department of Computer Science
1-五月-2012A Scalable High-Performance Virus Detection Processor Against a Large Pattern Set for Embedded Network SecurityCheng, Chieh-Jen; Wang, Chao-Ching; Ku, Wei-Chun; Chen, Tien-Fu; Wang, Jinn-Shyan; 資訊工程學系; Department of Computer Science
1-十二月-2017ULV-Turbo Cache for an Instantaneous Performance Boost on Asymmetric ArchitecturesWang, Po-Hao; Chien, Yung-Chen; Tsai, Shang-Jen; Lin, Xuan-Yu; Tanjung, Rizal; Lin, Yi-Sian; Syu, Shu-Wei; Lin, Tay-Jyi; Wang, Jinn-Shyan; Chen, Tien-Fu; 資訊工程學系; Department of Computer Science
1-一月-2016Variable-Length VLIW Encoding for Code Size Reduction in Embedded ProcessorsShyu, Ting-Yu; Su, Bo-Yu; Lin, Tay-Jyi; Yeh, Chingwei; Wang, Jinn-Shyan; Chen, Tien-Fu; 資訊工程學系; Department of Computer Science
2013Variation-Aware and Adaptive-Latency Accesses for Reliable Low Voltage CachesWang, Po-Hao; Cheng, Wei-Chung; Yu, Yung-Hui; Kao, Tang-Chieh; Tsai, Chi-Lun; Chang, Pei-Yao; Lin, Tay-Jyi; Wang, Jinn-Shyan; Chen, Tien-Fu; 資訊工程學系; Department of Computer Science
十月-2016Zero-Counting and Adaptive-Latency Cache Using a Voltage-Guardband Breakthrough for Energy-Efficient OperationsWang, Po-Hao; Cheng, Wei-Chung; Yu, Yung-Hui; Kao, Tang-Chieh; Tsai, Chi-Lun; Chang, Pei-Yao; Lin, Tay-Jyi; Wang, Jinn-Shyan; Chen, Tien-Fu; 資訊工程學系; Department of Computer Science
顯示 1 到 9 筆資料，總共 9 筆