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顯示 1 到 11 筆資料，總共 11 筆
公開日期標題作者
1-二月-2008Analysis of negative bias temperature instability in body-tied low-temperature polycrystalline silicon thin-film transistorsChen, Chih-Yang; Ma, Ming-Wen; Chen, Wei-Cheng; Lin, Hsiao-Yi; Yeh, Kuan-Lin; Wang, Shen-De; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2007Bias temperature instabilities for low-temperature polycrystalline silicon complementary thin-film transistorsChen, Chih-Yang; Lee, Jam-Wem; Ma, Ming-Wen; Chen, Wei-Cheng; Lin, Hsiao-Yi; Yeh, Kuan-Lin; Wang, Shen-De; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2007Dynamic negative bias temperature instability in low-temperature poly-Si thin-film transistorsChen, Chih-Yang; Wang, Tong-Yi; Ma, Ming-Wen; Chen, Wei-Cheng; Lin, Hsiao-Yi; Yeh, Kuan-Lin; Wang, Shen-De; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2006Effect of chemical mechanical polish process on low-temperature poly-SiGe thin-film transistorsShieh, Ming-Shan; Chen, Chih-Yang; Hsu, Yuan-Jiun; Wang, Shen-De; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2010High-Reliability Dynamic-Threshold Source-Side Injection for 2-Bit/Cell With MLC Operation of Wrapped Select-Gate SONOS in NOR-Type Flash MemoryWang, Kuan-Ti; Chao, Tien-Sheng; Wu, Woei-Cherng; Yang, Wen-Luh; Lee, Chien-Hsing; Hsieh, Tsung-Min; Liou, Jhyy-Cheng; Wang, Shen-De; Chen, Tzu-Ping; Chen, Chien-Hung; Lin, Chih-Hung; Chen, Hwi-Huang; 電子物理學系; Department of Electrophysics
1-六月-2009High-Speed Multilevel Wrapped-Select-Gate SONOS Memory Using a Novel Dynamic Threshold Source-Side-Injection (DTSSI) Programming MethodWang, Kuan-Ti; Chao, Tien-Sheng; Wu, Woei-Cherng; Chiang, Tsung-Yu; Wu, Yi-Hong; Yang, Wen-Luh; Lee, Chien-Hsing; Hsieh, Tsung-Min; Liou, Jhyy-Cheng; Wang, Shen-De; Chen, Tzu-Ping; Chen, Chien-Hung; Lin, Chih-Hung; Chen, Hwi-Huang; 電子物理學系; Department of Electrophysics
1-十一月-2009Physical Mechanism of High-Programming-Efficiency Dynamic-Threshold Source-Side Injection in Wrapped-Select-Gate SONOS for NOR-Type Flash MemoryWang, Kuan-Ti; Chao, Tien-Sheng; Chiang, Tsung-Yu; Wu, Woei-Cherng; Kuo, Po-Yi; Wu, Yi-Hong; Lu, Yu-Lun; Liao, Chia-Chun; Yang, Wen-Luh; Lee, Chien-Hsing; Hsieh, Tsung-Min; Liou, Jhyy-Cheng; Wang, Shen-De; Chen, Tzu-Ping; Chen, Chien-Hung; Lin, Chih-Hung; Chen, Hwi-Huang; 電子物理學系; Department of Electrophysics
1-十一月-2006Plasma damage-enhanced negative bias temperature instability in low-temperature polycrystalline silicon thin-film transistorsChen, Chih-Yang; Lee, Jam-Wem; Chen, Wei-g Chen; Lin, Hsiao-Yi; Yeh, Kuan-Lin; Lee, Po-Hao; Wang, Shen-De; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2007Plasma-induced damage on the performance and reliability of low-temperature polycrystalline silicon thin-film transistorsChen, Chih-Yang; Wang, Shen-De; Shieh, Ming-Shan; Chen, Wei-Cheng; Lin, Hsiao-Yi; Yeh, Kuan-Lin; Lee, Jam-Wem; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2006Process induced instability and reliability issues in low temperature poly-Si thin film transistorsChen, Chih-Yang; Wang, Shen-De; Shieh, Ming-Shan; Chen, Wei-Cheng; Lin, Hsiao-Yi; Yeh, Kuan-Lin; Lee, Jam-Wen; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2007A reliability model for low-temperature polycrystalline silicon thin-film transistorsChen, Chih-Yang; Lee, Jam-Wem; Lee, Po-Hao; Chen, Wei-Cheng; Lin, Hsiao-Yi; Yeh, Kuan-Lin; Ma, Ming-Wen; Wang, Shen-De; Lei, Tan-Fu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 1 到 11 筆資料，總共 11 筆