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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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Author: search.filters.author.WU, SLHas files: Yes

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    HIGH-PERFORMANCE POLYSILICON CONTACTED SHALLOW JUNCTIONS FORMED BY STACKED-AMORPHOUS-SILICON FILMS
    (1992-01-01)
    WU, SL
    ;
    LEE, CL
    ;
    LEI, TF
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    A high-performance polysilicon contacted shallow junction diode formed by using a stacked-amorphous-silicon (SAS) film as the diffusion source is reported. The diode-exhibited a very low leakage current (less-than-or-equal-to 1 nA/cm2 at -5 V), a very high breakdown voltage (greater-than-or-equal-to 100 V), and a forward ideality factor m less-than-or-equal-to 1.05 over 7 decades.
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    ELECTRICAL CHARACTERISTICS OF TEXTURED POLYSILICON OXIDE PREPARED BY A LOW-TEMPERATURE WAFER LOADING AND N-2 PREANNEALING PROCESS
    (1993-03-01)
    WU, SL
    ;
    LIN, TY
    ;
    LEE, CL
    ;
    LEI, TF
    ;
    電子工程學系及電子研究所
    A low-temperature wafer loading and N2 preannealing process is used to grow a thin textured polysilicon oxide. The polyoxide grown on the heavily doped polysilicon film exhibits less oxide tunneling leakage current and higher dielectric strength when the top electrode is positively biased.
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    TUNNEL OXIDE PREPARED BY THERMAL-OXIDATION OF THIN POLYSILICON FILM ON SILICON (TOPS)
    (1993-08-01)
    WU, SL
    ;
    LEE, CL
    ;
    LEI, TF
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    This letter presents a textured tunnel oxide, TOPS, prepared by thermally oxidizing a thin polysilicon film on a Si substrate. Due to the rapid diffusion of oxygen through the grain boundaries of the thin polysilicon into Si substrate and the enhanced oxidation rate at the grain boundaries, a textured Si/SiO2 interface is obtained. The textured interface results in the localized high fields and enhances electron injection into TOPS. The TOPS exhibits a higher electron injection efficiency, a better immunity to the electron trapping and the interface state generation under the high-field operation, and a higher asymmetric injection polarity as compared to the normal oxide.
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    CHARACTERISTICS OF POLYSILICON CONTACTED SHALLOW JUNCTION DIODE FORMED WITH A STACKED-AMORPHOUS-SILICON FILM
    (1993-10-01)
    WU, SL
    ;
    LEE, CL
    ;
    LEI, TF
    ;
    CHANG, HC
    ;
    電子工程學系及電子研究所
    A high-performance shallow junction diode formed with a stacked-amorphous-silicon (SAS) film is presented. Since the boundaries of stacked silicon layers and the poly/mono silicon interface act as a diffusion barrier for implanted dopants, the junction depth of SAS emitter contacted diode is about 500 angstrom shallower than that of the as-deposited polysilicon (ADP) emitter contacted diode. The fabricated SAS emitter contacted diodes exhibited a very low reverse leakage current (less-than-or-equal-to 1 nA/cm2 at -5 V) and a forward.ideality factor m almost-equal-to 1.001 over 7 decades on a log scale. The reverse I-V characteristics were found to be nearly independent of the reverse voltage from the room temperature to 200-degrees-C, and it was also found that the leakage current was due almost completely to the diffusion current. The plots of the diode leakage current versus the perimeter to area ratio showed that the periphery generation current only contributed a small portion to the total leakage. The processing temperature for the SAS emitter contacted p+-n diode can be as low as 600-degrees-C.
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    ENHANCEMENT OF OXIDE BREAK-UP BY IMPLANTATION OF FLUORINE IN POLY-SI EMITTER CONTACTED P-+-N SHALLOW JUNCTION FORMATION
    (1994-04-01)
    WU, SL
    ;
    LEE, CL
    ;
    LEI, TF
    ;
    CHEN, CF
    ;
    CHEN, LJ
    In this study, it is demonstrated that the incorporation of fluorine can enhance poly-Si/Si interfacial oxide break-up in the poly-Si emitter contacted p+-n shallow junction formation. The annealing temperature for breaking up the poly-Si/Si interfacial oxide has been found to be as low as 900-degrees-C. As a result, the junction depth of the BF2-implanted device is much larger than that of the boron-implanted device.
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    SUPPRESSION OF THE BORON PENETRATION INDUCED SI/SIO2 INTERFACE DEGRADATION BY USING A STACKED-AMORPHOUS-SILICON FILM AS THE GATE STRUCTURE FOR PMOSFET
    (1994-05-01)
    WU, SL
    ;
    LEE, CL
    ;
    LEI, TF
    ;
    CHEN, JF
    ;
    CHEN, LJ
    This letter reports that the boron penetration through the thin gate oxide into the Si substrate does not only cause a large threshold voltage shift but also induces a large degradation in the Si/SiO2 interface. An atomically flat Si/SiO2 interface can be easily obtained by using a stacked-amorphous-silicon (SAS) film as the gate structure for p+ poly-Si gate MOS devices even the annealing temperature is as high as 1000-degrees-C.