鰭狀場效電晶體 (FinFET) 電路之錯誤模型與測試方法

Full metadata record

DC Field	Value	Language
dc.contributor.author	趙家佐	en_US
dc.contributor.author	Chao Mango Chia-Tso	en_US
dc.date.accessioned	2014-12-13T10:46:02Z	-
dc.date.available	2014-12-13T10:46:02Z	-
dc.date.issued	2014	en_US
dc.identifier.govdoc	NSC102-2221-E009-187-MY3	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/100584	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=8107291&docId=428773	en_US
dc.description.sponsorship	科技部	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	鰭狀場效電晶體 (FinFET) 電路之錯誤模型與測試方法	zh_TW
dc.title	Fault Modeling and Test Methods for FinFET Ciricuits	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程學系及電子研究所	zh_TW
Appears in Collections:	Research Plans