標題: | 針對3D整合之電子設計自動化技術開發---子計畫五:應用在驗證與測試3D IC整合過程中以計算智慧為基礎的測試向量產生方法(II) Computational-Intelligence-Based Test Pattern Generation for Verification and Test of 3D IC Integration |
作者: | 溫宏斌 Wen Charles H.-P. 國立交通大學電信工程學系(所) |
關鍵字: | 矽穿孔;掃描測試;核心對應法;任務排程;動態壓頻調整;TSV;scan testing;core mapping;task scheduling;DVFS |
公開日期: | 2010 |
官方說明文件#: | NSC99-2220-E009-039 |
URI: | http://hdl.handle.net/11536/100664 https://www.grb.gov.tw/search/planDetail?id=2158378&docId=347336 |
顯示於類別: | Research Plans |
Files in This Item:
If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.