標題: | Harvest rate of reconfigurable pipelines |
作者: | Shi, WP Chang, MF Fuchs, WK 資訊工程學系 Department of Computer Science |
關鍵字: | harvest rate;yield;reconfigurable arrays;defect tolerance;pipelines;random graphs;percolation |
公開日期: | 1-Oct-1996 |
摘要: | For a reconfigurable architecture, the harvest rate is the expected percentage of defect-free processors that can be connected into the desired topology. In this paper, we give an analytical estimation for the harvest rate of reconfigurable multipipelines based on the following model: There are n pipelines each with m stages, where each stage of a pipeline is defective with identical independent probability 0.5 and spare wires are provided for reconfiguration. By formulating the ''shifting'' reconfiguration as weighted chains in a partial ordered set, we prove when n = Theta(m), the harvest rate is between 34% and 72%. |
URI: | http://dx.doi.org/10.1109/12.543713 http://hdl.handle.net/11536/1023 |
ISSN: | 0018-9340 |
DOI: | 10.1109/12.543713 |
期刊: | IEEE TRANSACTIONS ON COMPUTERS |
Volume: | 45 |
Issue: | 10 |
起始頁: | 1200 |
結束頁: | 1203 |
Appears in Collections: | Articles |
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