完整後設資料紀錄
DC 欄位語言
dc.contributor.author李鎮宜en_US
dc.contributor.authorLEE CHEN-YIen_US
dc.date.accessioned2014-12-13T10:51:01Z-
dc.date.available2014-12-13T10:51:01Z-
dc.date.issued2000en_US
dc.identifier.govdocNSC89-2218-E009-072zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/102459-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=597353&docId=112567en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.title全數位鎖相迴路設計與應用之研究(II)zh_TW
dc.titleThe Study of all Digital Phase Lock Loop Design and Its Applications(II)en_US
dc.typePlanen_US
dc.contributor.department國立交通大學電子工程學系zh_TW
顯示於類別:研究計畫