完整後設資料紀錄
DC 欄位語言
dc.contributor.authorChuang Ching-Teen_US
dc.contributor.authorJou Shyh-Jyeen_US
dc.contributor.authorLin Geng-Cingen_US
dc.contributor.authorWang Shao-Chengen_US
dc.contributor.authorLin Yi-Weien_US
dc.contributor.authorTsai Ming-Chienen_US
dc.contributor.authorShih Wei-Chiangen_US
dc.contributor.authorLien Nan-Chunen_US
dc.contributor.authorLee Kuen-Dien_US
dc.contributor.authorChu Jyun-Kaien_US
dc.date.accessioned2014-12-16T06:13:57Z-
dc.date.available2014-12-16T06:13:57Z-
dc.date.issued2013-11-12en_US
dc.identifier.govdocG11C007/00zh_TW
dc.identifier.govdocG11C029/00zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/104423-
dc.description.abstractA threshold voltage measurement device is disclosed. The device is coupled to a 6T SRAM. The SRAM comprises two inverters each coupled to a FET. Power terminals of one inverter are in a floating state; the drain and source of the FET coupled to the inverter are short-circuited. Two voltage selectors, a resistor, an amplifier and the SRAM are connected in a negative feedback way. Different bias voltages are applied to the SRAM for measuring threshold voltages of two FETs of the other inverter and the FET coupled to the other inverter. The present invention uses a single circuit to measure the threshold voltages of the three FETs without changing the physical structure of the SRAM. Thereby is accelerated the measurement and decreased the cost of the fabrication process and measurement instruments.zh_TW
dc.language.isozh_TWen_US
dc.titleThreshold voltage measurement devicezh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber08582378zh_TW
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