奈米級CMOS靜態隨機存取記憶體之 臨界電壓量測電路

Abstract

在現今的VLSI系統設計內，變異性問題是一個我們必須要審慎考慮的重要設計參數，而這種變異性會影響到電晶體元件的臨界電壓（VTH）值。然而，此臨界電壓(VTH)值與元件的性能，穩定性與可靠性緊緊相互連繫。故在我們談論變異性問題時，VTH值便是一項重要的指標，來反映這類現象、問題的嚴重性。也因此，我們需要創建一個測量的電路架構，來量取電晶體元件的臨界電壓值，那我們便可以快速方便的大量收集數據，來分析臨界電壓值變異性及其將如何影響測試晶片的穩定性。 因此對於奈米級CMOS 靜態隨機存取記憶體陣列，我們提出了一個單位元的量測方法與全數位輸出的電路架構。此電路結構包含內嵌式的運算放大器，且運用其負回授的電路操作特性來量取各個電晶體的臨界電壓值(包含holding PMOS, pull-down NMOS, and access NMOS) 。而測得的類比電壓將藉由雙 VCO類型的A/D電路轉換為頻率再由計數器轉為全數位的二進制數字讀出，以藉此方便數據的汲取，處理和統計分析。此512KB的測試電路採用UMC 55nm1P10M標準性能（SP）的CMOS技術實現。由Monte-Carlo 29萬筆的資料模擬顯示出此VTH測量電路擁有相當的準確性與可用性。且由Post-Layout模擬，在TT-Corner下溫度範圍涵蓋85℃至-45℃內，量測的誤差範圍約為2-9mV，而VCO類型的A/D轉換電路精準度可達0.2mV 足夠我們的量測電路所使用。

Variation issue is one of the key design factors for robust current VLSI systems, and this kind of issue will affect the device threshold voltage (VTH) value. However, the VTH value is still associated with the device performance, stability and reliability, then when we talk about the variation issue that the VTH is the important indicator to reflect this phenomenon. So we want to create a measurement structure that can measure the device threshold voltage, then we can collect the voltage data to realize how the variation issue will affect this testing chip. We present an all-digital bit transistor characterization scheme for CMOS 6T SRAM array. The scheme employs an on-chip operational amplifier feedback loop to measure the individual threshold voltage (VTH) of 6T SRAM bit cell transistors (holding PMOS, pull-down NMOS, and access NMOS) in SRAM cell array environment. The measured voltage is converted to frequency with dual VCO and counter based digital read-out to facilitate data extraction, processing, and statistical analysis. A 512Kb test chip is implemented in 55nm 1P10M Standard Performance (SP) CMOS technology. Monte Carlo simulations indicate that the accuracy of the VTH measurement scheme is about 2-7mV at TT corner across temperature range from 85oC to -45oC, and post-layout simulations show the resolution of the digital read-out scheme is < 0.2mV per bit.