Title: Bonding method for three-dimensional integrated circuit and three-dimensional integrated circuit thereof
Authors: Chen Kuan-Neng
Hsu Sheng-Yao
Issue Date: 13-Aug-2013
Abstract: The present invention discloses a bonding method for a three-dimensional integrated circuit and the three-dimensional integrated circuit thereof. The bonding method comprises the steps of: providing a substrate; depositing a film layer on the substrate; providing a light source to light onto the film layer to form a graphic structure; forming a metal co-deposition layer by a first metal and a second metal that are co-deposited on the film layer; providing a first integrated circuit having the substrate, the film layer and the metal co-deposition layer sequentially; providing a second integrated circuit that having the metal co-deposition layer, the film layer and the substrate sequentially; and the first integrated circuit is bonded with the second integrated circuit at a predetermined temperature to form a three-dimensional integrated circuit.
Gov't Doc #: H01L023/34
URI: http://hdl.handle.net/11536/104452
Patent Country: USA
Patent Number: 08508041
Appears in Collections:Patents


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