完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Huang | en_US |
dc.contributor.author | Po-Tsang | en_US |
dc.contributor.author | Hwang | en_US |
dc.contributor.author | Wei | en_US |
dc.contributor.author | Chang | en_US |
dc.contributor.author | Shu-Wei | en_US |
dc.date.accessioned | 2014-12-16T06:14:20Z | - |
dc.date.available | 2014-12-16T06:14:20Z | - |
dc.date.issued | 2011-03-08 | en_US |
dc.identifier.govdoc | G11C015/00 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/104676 | - |
dc.description.abstract | The present invention discloses a butterfly match-line structure and a search method implemented thereby, wherein the parallelism of the match lines is increased to shorten the search time, and a butterfly-type connection is used to reduce the power consumption and achieve the best energy efficiency. Via the butterfly-type connection, information can be reciprocally transmitted between the parallel match lines, which are independent originally. When a miss case occurs, more succeeding memory cells will not be compared but will be turned off. Thereby, the power consumption is reduced. Further, XOR-based conditional keepers are used to reduce the matching time and the power consumption. Besides, such a circuit is also used to shorten the delay time of the butterfly-type connection. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | Butterfly match-line structure and search method implemented thereby | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | USA | zh_TW |
dc.citation.patentnumber | 07903443 | zh_TW |
顯示於類別: | 專利資料 |