完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Su | en_US |
dc.contributor.author | Chau-Chin | en_US |
dc.contributor.author | Lu | en_US |
dc.contributor.author | Hung-Wen | en_US |
dc.contributor.author | Chi | en_US |
dc.contributor.author | Shun-Min | en_US |
dc.date.accessioned | 2014-12-16T06:14:29Z | - |
dc.date.available | 2014-12-16T06:14:29Z | - |
dc.date.issued | 2009-01-06 | en_US |
dc.identifier.govdoc | H03M001/12 | zh_TW |
dc.identifier.govdoc | H03M001/06 | zh_TW |
dc.identifier.govdoc | H03M001/10 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/104758 | - |
dc.description.abstract | In a precisely self-calibrating high-speed analog to digital converter the aspect ratios of tri-state inverters are adjusted to fine-tune threshold voltage as comparators. And the multiplexers composed of tri-state inverters amplify the signal from the output of comparators. Their switches of tri-state inverters may be properly controlled to select the optimal channels and reduce unnecessary power consumption. The calibration circuitry utilizes under-sampling to calculate the duty cycles of comparators, selecting the optimal comparators and channels. By the way, the invention may avoid process variation. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | Self-calibrating high-speed analog-to-digital converter | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | USA | zh_TW |
dc.citation.patentnumber | 07474239 | zh_TW |
顯示於類別: | 專利資料 |