| 標題: | SELF-CALIBRATING HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER |
| 作者: | SU, CHAU-CHIN LU, HUNG-WEN CHI, SHUN-MIN |
| 公開日期: | 31-七月-2008 |
| 摘要: | A precisely self-calibrating high-speed analog to digital converter is disclosed, wherein the aspect ratios of tri-state inverters are adjusted to fine-tune threshold voltage as comparators. And the multiplexers composed of tri-state inverters amplify the signal from the output of comparators. Their switches of tri-state inverters may be properly controlled to select the optimal channels and reduce unnecessary power consumption. The calibration circuitry utilizes under-sampling to calculate the duty cycles of comparators, selecting the optimal comparators and channels. By the way, the invention may avoid process variation. |
| 官方說明文件#: | H03M001/10 H03M001/12 |
| URI: | http://hdl.handle.net/11536/105580 |
| 專利國: | USA |
| 專利號碼: | 20080180289 |
| 顯示於類別: | 專利資料 |

