完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | CHEN KUAN-NENG | en_US |
| dc.contributor.author | Hsu Sheng-Yao | en_US |
| dc.date.accessioned | 2014-12-16T06:15:00Z | - |
| dc.date.available | 2014-12-16T06:15:00Z | - |
| dc.date.issued | 2013-03-21 | en_US |
| dc.identifier.govdoc | H01L023/48 | zh_TW |
| dc.identifier.govdoc | H01L021/60 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/105065 | - |
| dc.description.abstract | The present invention discloses a bonding method for a three-dimensional integrated circuit and the three-dimensional integrated circuit thereof. The bonding method comprises the steps of: providing a substrate; depositing a film layer on the substrate; providing a light source to light onto the film layer to form a graphic structure; forming a metal co-deposition layer by a first metal and a second metal that are co-deposited on the film layer; providing a first integrated circuit having the substrate, the film layer and the metal co-deposition layer sequentially; providing a second integrated circuit that having the metal co-deposition layer, the film layer and the substrate sequentially; and the first integrated circuit is bonded with the second integrated circuit at a predetermined temperature to form a three-dimensional integrated circuit. | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.title | BONDING METHOD FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT AND THREE-DIMENSIONAL INTEGRATED CIRCUIT THEREOF | zh_TW |
| dc.type | Patents | en_US |
| dc.citation.patentcountry | USA | zh_TW |
| dc.citation.patentnumber | 20130069248 | zh_TW |
| 顯示於類別: | 專利資料 | |

