標題: Plasma-induced damage on the performance and reliability of low-temperature polycrystalline silicon thin-film transistors
作者: Chen, Chih-Yang
Wang, Shen-De
Shieh, Ming-Shan
Chen, Wei-Cheng
Lin, Hsiao-Yi
Yeh, Kuan-Lin
Lee, Jam-Wem
Lei, Tan-Fu
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2007
摘要: We have investigated the impact of plasma-induced damage on the performance and reliability of low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs). The LTPS TFTs having different antenna structures were used to study the effects of the plasma-etching process. We observed that performance instability occurred for the devices having a relatively large-area antenna. Plasma damage mainly caused nonuniform distribution of the threshold voltages in the LTPS TFTs, presumably because of charge trapping in the gate dielectric during the plasma-etching process. The reliabilities of the LTPS TFTs having larger antenna areas were found to be more degraded under gate-bias stress and hot-carrier stress than those of the samples having smaller antenna areas. Because of their enhanced plasma damage, we speculate that the LTPS TFTs having larger antenna areas possess more trap states in the gate dielectrics. During gate-bias stress or hot-carrier stress, therefore, charges can be injected into the gate dielectric through trap-assisted tunneling, resulting in significant degradation of both the performance and reliability. (c) 2006 The Electrochemical Society.
URI: http://hdl.handle.net/11536/11404
http://dx.doi.org/10.1149/1.2386952
ISSN: 0013-4651
DOI: 10.1149/1.2386952
期刊: JOURNAL OF THE ELECTROCHEMICAL SOCIETY
Volume: 154
Issue: 1
起始頁: H30
結束頁: H35
Appears in Collections:Articles


Files in This Item:

  1. 000242538600066.pdf

If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.