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dc.contributor.authorKer, Ming-Douen_US
dc.contributor.authorChen, Jia-Hueien_US
dc.date.accessioned2014-12-08T15:15:30Z-
dc.date.available2014-12-08T15:15:30Z-
dc.date.issued2006-11-01en_US
dc.identifier.issn0018-9200en_US
dc.identifier.urihttp://dx.doi.org/10.1109/JSSC.2006.883331en_US
dc.identifier.urihttp://hdl.handle.net/11536/11593-
dc.description.abstractA novel self-substrate-triggered technique for on-chip ESD protection design is proposed to solve the non-uniform turn-on phenomenon of multi-finger gate-grounded nMOS (GGnMOS). The center-finger nMOS transistors in the multi-finger GGnMOS structure are always turned on first under ESD stress, so its source terminal is connected to the base (substrate) terminals of the other parasitic lateral n-p-n bipolar transistors (BJTs in the GGnMOS structure) to form the self-substrate-triggered design. With the proposed self-substrate-triggered technique, the first turned-on center-finger nMOS transistors are used to trigger on the others. Therefore, all fingers of GGnMOS can be triggered on simultaneously to discharge ESD current. From the experimental results verified in a 0.13-mu m CMOS process with the thin gate oxide of 25 A, the turn-on uniformity and ESD robustness of the GGnMOS can be greatly improved without increasing extra layout area through the proposed self-substrate-triggered technique.en_US
dc.language.isoen_USen_US
dc.subjectelectrostatic discharge (ESD)en_US
dc.subjectmulti-finger gate-grounded nMOSen_US
dc.subjectnon-uniform turn-on phenomenonen_US
dc.subjectself-substrate-triggered techniqueen_US
dc.titleSelf-substrate-triggered technique to enhance turn-on uniformity of multi-finger ESD protection devicesen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.doi10.1109/JSSC.2006.883331en_US
dc.identifier.journalIEEE JOURNAL OF SOLID-STATE CIRCUITSen_US
dc.citation.volume41en_US
dc.citation.issue11en_US
dc.citation.spage2601en_US
dc.citation.epage2609en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000241713500025-
Appears in Collections:Conferences Paper


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