標題: | DC-balance low-jitter transmission code for 4-PAM-signaling |
作者: | Chen, Hsiao-Yun Lin, Chih-Hsien Jou, Shyh-Jye 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | low jitter;4-PAM;transmission code;8B/10B code |
公開日期: | 1-Sep-2006 |
摘要: | This investigation proposes a novel dc-balanced low-jitter transmission code, a 4-PAM symmetric code, for a 4-PAM signaling system. The 4-PAM symmetric code preserves all of the useful characteristics of the 8B/10B code such as dc-balanced serial data and guaranteed transitions in the symbol stream for clock recovery. Moreover, the proposed method decreases the jitter of the timing transition of the data in the receiver and consumes half of the data bandwidth, because it transmits in 4-PAM. The design results using the UMC 0.18-mu m process demonstrate that the new transmission code can decrease the jitter of the transition point by +/- 25% of the transition region. The operation speed of the encoder/decoder for the 4-PAM symmetric code is 819 MHz with 16-b inputs (13.1 Gb/s) and 704 MHz with 16-b outputs (11.3 Gb/s). |
URI: | http://dx.doi.org/10.1109/TCSII.2006.879094 http://hdl.handle.net/11536/11879 |
ISSN: | 1057-7130 |
DOI: | 10.1109/TCSII.2006.879094 |
期刊: | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS |
Volume: | 53 |
Issue: | 9 |
起始頁: | 827 |
結束頁: | 831 |
Appears in Collections: | Articles |
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