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dc.contributor.authorShih, Wen-Lien_US
dc.contributor.authorYou, Yi-Pingen_US
dc.contributor.authorHuang, Chung-Wenen_US
dc.contributor.authorLee, Jenq Kuenen_US
dc.date.accessioned2015-07-21T11:21:05Z-
dc.date.available2015-07-21T11:21:05Z-
dc.date.issued2014-11-01en_US
dc.identifier.issn1084-4309en_US
dc.identifier.urihttp://dx.doi.org/10.1145/2668119en_US
dc.identifier.urihttp://hdl.handle.net/11536/123924-
dc.description.abstractMultithread programming is widely adopted in novel embedded system applications due to its high performance and flexibility. This article addresses compiler optimization for reducing the power consumption of multithread programs. A traditional compiler employs energy management techniques that analyze component usage in control-flow graphs with a focus on single-thread programs. In this environment the leakage power can be controlled by inserting on and off instructions based on component usage information generated by flow equations. However, these methods cannot be directly extended to a multithread environment due to concurrent execution issues. This article presents a multithread power-gating framework composed of multithread power-gating analysis (MTPGA) and predicated power-gating (PPG) energy management mechanisms for reducing the leakage power when executing multithread programs on simultaneous multithreading (SMT) machines. Our multithread programming model is based on hierarchical bulk-synchronous parallel (BSP) models. Based on a multithread component analysis with dataflow equations, our MTPGA framework estimates the energy usage of multithread programs and inserts PPG operations as power controls for energy management. We performed experiments by incorporating our power optimization framework into SUIF compiler tools and by simulating the energy consumption with a post-estimated SMT simulator based on Wattch toolkits. The experimental results show that the total energy consumption of a system with PPG support and our power optimization method is reduced by an average of 10.09% for BSP programs relative to a system without a power-gating mechanism on leakage contribution set to 30%; and the total energy consumption is reduced by an average of 4.27% on leakage contribution set to 10%. The results demonstrate our mechanisms are effective in reducing the leakage energy of BSP multithread programs.en_US
dc.language.isoen_USen_US
dc.subjectDesignen_US
dc.subjectLanguageen_US
dc.subjectCompilers for low poweren_US
dc.subjectleakage power reductionen_US
dc.subjectpower-gating mechanismsen_US
dc.subjectmultithreadingen_US
dc.titleCompiler Optimization for Reducing Leakage Power in Multithread BSP Programsen_US
dc.typeArticleen_US
dc.identifier.doi10.1145/2668119en_US
dc.identifier.journalACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMSen_US
dc.citation.volume20en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000345523400009en_US
dc.citation.woscount0en_US
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