標題: | A loop partition technique for reducing cache bank conflict in multithreaded architecture |
作者: | Wu, CC Chen, C 交大名義發表 資訊工程學系 National Chiao Tung University Department of Computer Science |
關鍵字: | loop partition;multibank cache;bank conflict;multithreaded processor;compile time |
公開日期: | 1-一月-1996 |
摘要: | Parallel multithreaded architectures take advantage of the ability to execute more than one thread simultaneously on a single chip at low synchronisation and communication costs and high hardware resource utilisation. However, a high bandwidth cache, such as a multibank cache, is especially critical to serve memory accesses issued at the same time from different threads. To prevent bank conflicts of multibank cache from seriously degrading system performance, a loop partition method is proposed to reduce or even eliminate bank conflicts. The partition allows each thread access to certain bank modules and prevents any two from accessing the same bank module. The method neither slows down the clock rate nor increases the array subscript expression complexity. The performance gains of the bank-conflict-free loop partition approach are shown in simulation results. |
URI: | http://hdl.handle.net/11536/1554 |
ISSN: | 1350-2387 |
期刊: | IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES |
Volume: | 143 |
Issue: | 1 |
起始頁: | 30 |
結束頁: | 36 |
顯示於類別: | 期刊論文 |