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dc.contributor.authorWang, Yu-Jiuen_US
dc.contributor.authorLiao, I-Noen_US
dc.contributor.authorTsai, Chao-Hanen_US
dc.contributor.authorPakasiri, Chatrpolen_US
dc.date.accessioned2015-07-21T11:20:43Z-
dc.date.available2015-07-21T11:20:43Z-
dc.date.issued2014-11-01en_US
dc.identifier.issn0018-9480en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TMTT.2014.2352211en_US
dc.identifier.urihttp://hdl.handle.net/11536/123935-
dc.description.abstractThis paper introduces a new class of RF-to-dc rectifiers called the in-phase gate-boosting rectifier (IGR). An IGR utilizes an in-phase passive voltage multiplier (IPVM) to boost in-phase swing from the driving swing. This design simultaneously reduces the effective threshold voltage, forward resistance, and the reverse leakage current of the rectifying transistor. As a consequence, the sensitivity and the efficiency of a high-frequency rectifier can be improved. Furthermore, a C-G-loaded IPVM presents low input conductance and is shunted with the drains/sources of the rectifying transistors. This makes the realization of the input matching network between the IGR core and the antenna easier, and achieves a higher voltage swing at the input terminals of the IGR core. The criteria, properties, and relating proofs of the IPVM are also discussed. A differential seven-stage millimeter-wave IGR is implemented in a 65-nm RF CMOS process. In this design, an interleaving internal threshold cancellation bias scheme is also introduced to further suppress the power consumption due to biasing circuitry without increasing the layout area. The implemented integrated circuit achieves a state-of-the-art -7-dBm sensitivity with 20% peak efficiency at 53 GHz and a bandwidth of 10 GHz from 46 to 56 GHz.en_US
dc.language.isoen_USen_US
dc.subjectEnergy harvestingen_US
dc.subjectrectifying circuitsen_US
dc.titleA Millimeter-Wave In-Phase Gate-Boosting Rectifieren_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TMTT.2014.2352211en_US
dc.identifier.journalIEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUESen_US
dc.citation.volume62en_US
dc.citation.issue11en_US
dc.citation.spage2768en_US
dc.citation.epage2783en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000344990700028en_US
dc.citation.woscount0en_US
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