Temporal Multithreading Architecture Design for a Java Processor

Abstract

In this paper, we presents the design of a hardware temporal multi-threading architecture for a Java processor. The Java virtual machine (JVM) model is a stack machine where the process state is the snapshot of the Java stack If the runtime stack is stored (or cached) in on-chip memory for performance reasons, the backup and restoration of the Java runtime stacks for context switching would be expensive operations. We propose a Ping-Pong buffer architecture in this paper to facilitate fully hardware-based multi-threading capability for a Java processor. The proposed hardware architecture has been implemented and verified on an FPGA platform, Xilinx ML605. The experimental results show that the proposed context-switching efficiency is much higher than that of a software-based VM such as the CVM-JIT. Therefore, the proposed hardwired Java processor is promising for embedded applications that require heavy multi-threading operations.