整合單晶光感測二極體之高速 CMOS 光接收機

Abstract

本論文介紹了目前文獻發表之光接收機，說明其所面臨之挑戰、設計困難、與操作限制，並提出及實作二個高速光感測器及三個高速高靈敏度光接收機。光感測器的頻寬通常主宰著接收機的整體資料速度，如何利用具價格競爭力的 CMOS 製程來製作高速光感測器，對於整合單晶光接收機非常重要，而所提出之高速光感測器分別是 Lateral PIN Detector 以及 Meshed SMPD，其速度均達到 Gb/s 的等級。光接收機電路方面，光接收機電路將感測器受光所產生之電流轉換成為數位準位的電壓並輸出，同時從輸入資料訊號萃取出其對應之時脈，並輸出給後端電路參考。接收機面臨了取捨於功率消耗、資料速度、以及靈敏度的問題。本論文致力於光接收機研發與實作，提出光接收機，有三：轉阻放大器之光接收機、積分器之光接收機、電流放大器之光接收機，均具備有高速度、高靈敏度、高功率效率等性能。

To sustain the high-throughput requirements of the data center, more and more data bandwidth of short-reach optical-links are required. They should achieve the performance, such as low cost, small-form factor, high energy efficiency, high bandwidth, high sensitivity, and high integration. To achieve these design goals, two PDs and three optical receivers are proposed. By using CMOS technology, the PD bandwidth generally dominates the receiver operating speed. In this dissertation, two high-speed PDs are proposed for Gb/s operation. One is Lateral PIN detector, and the other one is meshed spatially-modulated PD. An optical receiver converts the PD current to digital-level voltage signals, and simultaneously extracts out its clock signal. With trade-off between input sensitivity and power dissipation, the mainly power consumption of optical receiver strongly depends on the sensitivity of the receiver front-end. In this dissertation, three high-speed optical receiver front-ends are proposed to operate with high sensitivity and high energy efficiency. They are TIA-based, integrating-type, and current amplifier based optical receiver front-end.