完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wang, CC | en_US |
dc.contributor.author | Chen, MC | en_US |
dc.date.accessioned | 2014-12-08T15:17:19Z | - |
dc.date.available | 2014-12-08T15:17:19Z | - |
dc.date.issued | 2006-03-01 | en_US |
dc.identifier.issn | 0021-4922 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1143/JJAP.45.1582 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/12593 | - |
dc.description.abstract | NiSi-silicided n(+)p shallow junctions are fabricated by P+/F+ dual implantation into/through a thin NiSi silicide layer followed by low-temperature furnace annealing. The incorporation of fluorine atoms in the 61-nm-thick NiSi film retards film agglomeration, making the film stable up to 750 degrees C for 90 min. A forward ideality factor of 1.08 and a reverse bias current density (at 5 V) of 0.7 nA/cm(2) can be attained for the NiSi (61 nm)/n(+)p junctions with an area of 580 x 580 mu m(2) fabricated by P+/F+ dual implantation at 35/30 keV to a close of 5 x 10(15) 15 x 10(15) cm(-2) followed by 750 degrees C thermal annealing. The junction formed is about 71 nm from the NiSi/Si interface. Activation energy measurement shows that the reverse bias area current of the NiSi/n(+)p junctions is dominated by the diffusion current, while their reverse bias peripheral Current is dominated by the minority generation Current at room temperature. This implies the presence of generation centers in and/or close to the junction region along the perimeter. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | NiSi | en_US |
dc.subject | silicide | en_US |
dc.subject | n(+)p shallow junction | en_US |
dc.subject | thermal stability | en_US |
dc.subject | agglomeration | en_US |
dc.title | Formation and characterization of NiSi-silicided n(+)p shallow junctions | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1143/JJAP.45.1582 | en_US |
dc.identifier.journal | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | en_US |
dc.citation.volume | 45 | en_US |
dc.citation.issue | 3A | en_US |
dc.citation.spage | 1582 | en_US |
dc.citation.epage | 1587 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000236191900021 | - |
dc.citation.woscount | 3 | - |
顯示於類別: | 期刊論文 |