微量鎵摻雜於非晶態銦鋅錫氧化物薄膜電晶體穩定性提升之研究

Abstract

本論文研究非晶態銦錫鋅氧化物 (a-InSnZnO) 做為薄膜電晶體的主動層材料，此材料電子遷移率能夠高達30 cm2/V．s以上，符合未來在顯示器上的需求;最重要的是，因為氧化錫的存在，使薄膜具有極高的抗蝕刻力，因此有機會製作出背通道蝕刻型 (Back-Channel Etching) 之薄膜電晶體元件，對於節省成本以及微縮元件具有相當大的優勢。我們使用射頻磁控濺鍍系統 (RF Magnetron Sputtering System) 的濺鍍方式沉積主動層，而非晶態銦錫鋅氧化物雖具有較高電子遷移率，但是在電性上並不穩定，所以本論文選用了摻雜極微量鎵的方式以提高元件的穩定性，最後再與以背通道蝕刻製程製作出來的元件做比較，以了解濕式製程 (Wet Etching Process) 對元件的影響。 論文中，首先探討不同氧含量於氧化銦鋅錫薄膜中對於元件電特性的影響，發現在濺鍍沉積薄膜時通入適當的氧氣將有助於修補薄膜內因氧空缺而形成的淺層缺陷能態，改善基本電特性，進而得到最佳條件，若再繼續增加氧通量，反而會破壞原先結構而使氧空缺反增，電性則劣化。再來，我們藉由不同的可靠度量測與分析，透過參數萃取以及模型計算來探討摻雜微量鎵後對薄膜的氧空缺含量影響與能隙間缺陷能態的分佈。最後，我們成功製作出背通道蝕刻型的元件，並探討經過蝕刻步驟之後對元件造成劣化之原因。 最後，我們成功找到銦鋅錫半導體薄膜的最佳條件，其載子遷移率為31.29 cm2/V．s，臨界電壓為 -4.8 V，次臨界擺幅為0.4;並以摻雜微量鎵的方式做出具高穩定性的銦鋅錫薄膜電晶體，其載子遷移率為24.34 cm2/V．s，臨界電壓為 -1.8 V，次臨界擺幅為0.4;至於背通道蝕刻型元件，不摻雜鎵與摻雜鎵的半導體薄膜元件，其載子遷移率分別為為34.42與26.08 cm2/V．s，臨界電壓為 -5.8與 -2.8 V，次臨界擺幅皆為0.5。

In this thesis, a promising material, called amorphous InZnSnO (a-IZTO), is investigated for achieving the high mobility oxide thin-film transistors (TFTs) for next generation display. Many researches have reported that a-IZTO with high carrier concentration and high etching resistance suffers from the issue of stability under gate-bias stress. Compared to a-IGZO, a-IZTO is very suitable for back channel etching (BCE) process due to its high etching selectivity to electrodes in acid solution. There are some widely known methods for improving the stability of TFTs, such as post-annealing treatment and the post passivation deposition. We proposed the improvement of TFT stability by doping a small amount of Ga into a-IZTO. Ga3+ ions can suppress the carrier generation and the reduction of electron density is attributed to the stronger Ga-O (353.5 KJ/mol) bond strength compared with In-O (320.1 KJ/mol) and Zn-O (348.0 KJ/mol) bonds. Hence, the stability can be improved by doping Ga into the channel layer of a-IZTO TFTs. The oxide TFT with BCE structure is hopeful to be realized by using a-IZTO with and without Ga doping in the channel layer. We investigated the characteristics of a-IZTO and a-G:IZTO and the degradation of a-IZTO and a-G:IZTO fabricated by BCE process. Finally, we optimized the deposition condition of a-IZTO and a-G:IZTO. The value of the mobility, threshold voltage (Vth) and subthreshold swing (S.S.) were 31.29 cm2/V．s, -4.8 V and 0.4 for a-IZTO and 24.34 cm2/V．s, -1.8 V and 0.4 for a-G:IZTO, respectively. Furthermore, for BCE type devices, the value of the mobility, Vth and S.S. were 34.42 cm2/V．s, -5.8 V and 0.5 for a-IZTO and 26.08 cm2/V．s, -2.8 V and 0.5 for a-G:IZTO, respectively.