標題: 77GHz Power Amplifier Design Using WIN 0.1 mu m GaAs pHEMT Process
作者: Lai, Kuan-Ting
Wu, Kun-Long
Hu, Robert
Jou, Christina F.
交大名義發表
National Chiao Tung University
公開日期: 1-Jan-2014
摘要: This paper reports our 77GHz power-amplifier designs using WIN 0.1 mu m GaAs pHEMT process provided by the commercial WIN foundry. The first two stages of the power amplifier is made of common-source transistors for gain amplification, and then followed by two-and four-paralleled transistors where the 3dB two-way Wilkinson power splitters/combiners for large output power delivery are used. All the by-pass capacitors for drain and gate biases have been optimized to have small series impedance at W-band. The input DC-blocking capacitor is made coupled lines, which also functions as tuning circuit. With 2.5V and 350mA drain bias, the small-signal gain is 12dB, as measured on-wafer at room temperature; the output-referred 1dB compression point is 6dBm. With 3dBm input power, the saturated output power is around 8.6dBm. Good input- and output-port matching has also been observed. The chip size is 1000x2500 mu m(2) and it consumes 875mW.
URI: http://hdl.handle.net/11536/129810
ISBN: 978-1-4673-5225-3
ISSN: 
期刊: 2014 XXXITH URSI GENERAL ASSEMBLY AND SCIENTIFIC SYMPOSIUM (URSI GASS)
Appears in Collections:Conferences Paper