A novel dynamic threshold voltage MOSFET (DTMOS) using heterostructure channel of Si1-yCy interlayer

標題:	A novel dynamic threshold voltage MOSFET (DTMOS) using heterostructure channel of Si1-yCy interlayer
作者:	Shieh, MS Chen, PS Tsai, MJ Lei, TF 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
關鍵字:	DTMOS;super-steep-retrograde (SSR) channel;Si1-yCy
公開日期:	1-十月-2005
摘要:	We have demonstrated the fabrication of dynamic threshold voltage MOSFET (DTMOS) using the Si1-yCy(y = 0.005) incorporation inerlayer channel. Compare to conventional Si-DTMOS, the introduction of the Si1-yCy interlayer for this device is realized by super-steep-retrograde (SSR) channel profiles due to the retardation of boron diffusion. A low surface channel impurity with heavily doped substrate can be achieved simultaneously. This novel Si1-yCy channel heterostructure MOSFET exhibits higher transconductance and turn on current.
URI:	http://dx.doi.org/10.1109/LED.2005.856011 http://hdl.handle.net/11536/13243
ISSN:	0741-3106
DOI:	10.1109/LED.2005.856011
期刊:	IEEE ELECTRON DEVICE LETTERS
Volume:	26
Issue:	10
起始頁:	740
結束頁:	742
顯示於類別：	期刊論文

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