標題: | A Comprehensive Characterization Method for Lateral Profiling of Interface Traps and Trapped Charges in P-SONOS Cell Devices |
作者: | Guo, Jyh-Chyurn Du, Pei-Ying 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | SONOS;charge pumping;lateral profiling;interface traps;localized charges;trapped holes |
公開日期: | 三月-2017 |
摘要: | A comprehensive characterization method has been developed in this paper for reliable lateral profiling of the interface traps (Delta N-it), localized charges (Delta N-ot), and trapped holes (Delta N-hole) in P-SONOS cell devices. Charge pumping current (I-CP) measurement can be used to probe Delta N-it and Delta N-ot from the increase of maximum I-CP (I-CP,I- max) and the shift of I-CP curve along the base level voltage (V-b). When increasing the program and erase (P/E) cycles, the negative threshold voltage (V-T) shift at both program and erase states suggests the generation of Delta N-hole. The evolution of Delta N-it, Delta N-ot, and Delta N-hole during P/E cycling can consistently explain the nonmonotonic variations of gate induced drain leakage current (I-GIDL) and substrate current (I-SUB) as well as dramatic differences between the source and drain. The lateral migration of Delta N-ot caused by extending P/E cycles may lead to the failure of two-bit operation in SONOS cell devices. The larger V-T shift and subthreshold swing, smaller read current, and lower transconductance may degrade the endurance and retention of P-SONOS when applied in Flash memory. |
URI: | http://dx.doi.org/10.1109/TDMR.2016.2626461 http://hdl.handle.net/11536/133144 |
ISSN: | 1530-4388 |
DOI: | 10.1109/TDMR.2016.2626461 |
期刊: | IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY |
Volume: | 17 |
Issue: | 1 |
起始頁: | 121 |
結束頁: | 129 |
顯示於類別: | 期刊論文 |