標題: A low-power low-swing single-ended multi-port SRAM
作者: Yang, Hao-, I
Chang, Ming-Hung
Lai, Ssu-Yun
Wang, Hsiang-Fei
Hwang, Wei
電機學院
College of Electrical and Computer Engineering
公開日期: 2007
摘要: In this paper, a new single-ended 6-T SRAM cell is proposed. It has a very strong static noise margin (SNM) during read cycles. Meanwhile, data can be easily written because of floating virtual ground and I-T equalizer insertion within cell. Low-swing writing ability is achieved by these two approaches. A single-ended current-mode sensing amplifier is also presented. This amplifier can sense a very small swing of bitline, equipping with a high noise-rejection and high PVT-tolerance ability. A low-swing 3-port 64x32-bit SRAM macro is simulated in TSMC 130nm CMOS technology. It consumes a minimum of 725 mu W and 658 mu W per-port at IGHz with 1.2V supply voltage for read and write power, respectively.
URI: http://hdl.handle.net/11536/134455
ISBN: 978-1-4244-0582-4
期刊: 2007 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PAPERS
起始頁: 28
結束頁: +
顯示於類別:會議論文