標題: Alternate Hammering Test for Application-Specific DRAMs and an Industrial Case Study
作者: Huang, Rei-Fu
Yang, Hao-Yu
Chao, Mango C. -T.
Lin, Shih-Chin
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: embedded-DRAM;hammering test
公開日期: 2012
摘要: This paper presents a novel memory test algorithm, named alternate hammering test, to detect the pairwise word-line hammering faults for application-specific DRAMs. Unlike previous hammering tests, which require excessively long test time, the alternate hammering test is designed scalable to industrial DRAM arrays by considering the array layout for potential fault sites and the highest DRAM-access frequency in real system applications. The effectiveness and efficiency of the proposed alternate hammering test are validated through the test application to an eDRAM macro embedded in a storage-application SoC.
URI: http://hdl.handle.net/11536/134743
ISBN: 978-1-4503-1199-1
ISSN: 0738-100X
期刊: 2012 49TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC)
起始頁: 1012
結束頁: 1017
Appears in Collections:Conferences Paper