標題: | 3D 65nm CMOS with 320 degrees C Microwave Dopant Activation |
作者: | Lee, Yao-Jen Lu, Yu-Lun Hsueh, Fu-Kuo Huang, Kuo-Chin Wan, Chia-Chen Cheng, Tz-Yen Han, Ming-Hung Kowalski, Jeff M. Kowalski, Jeff E. Heh, Dawei Chuang, Hsi-Ta Li, Yiming Chao, Tien-Sheng Wu, Ching-Yi Yang, Fu-Liang 電子物理學系 電子工程學系及電子研究所 電信工程研究所 Department of Electrophysics Department of Electronics Engineering and Institute of Electronics Institute of Communications Engineering |
公開日期: | 2009 |
摘要: | For the first time, CMOS TFTs of 65nm channel length have been demonstrated by using a novel microwave dopant activation technique. A low temperature microwave anneal is. demonstrated and discussed in this study. We have successfully activated the poly-Si gate electrode and source/drain junctions, BF2 for p-MOS TFTs and P-31 for n-MOS TFTs at a low temperature of 320 degrees C without diffusion. The technology is promising for high performance and low cost upper layer nanometer-scale transistors as required by low temperature 3D-ICs fabrication. |
URI: | http://hdl.handle.net/11536/134937 |
ISBN: | 978-1-4244-5639-0 |
期刊: | 2009 IEEE INTERNATIONAL ELECTRON DEVICES MEETING |
起始頁: | 27 |
結束頁: | + |
Appears in Collections: | Conferences Paper |