標題: Study of low-temperature and post-stress hysteresis in high-k gate dielectrics
作者: Wu, You-Lin
Lin, Shi-Tin
Yang, Chang Cheng
Wu, Chien-Hung
Chin, Albert
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2007
URI: http://hdl.handle.net/11536/135140
ISBN: 978-1-4244-1891-6
期刊: 2007 INTERNATIONAL SEMICONDUCTOR DEVICE RESEARCH SYMPOSIUM, VOLS 1 AND 2
起始頁: 175
結束頁: +
顯示於類別:會議論文