完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, Yu-Wei | en_US |
dc.contributor.author | Chen, Kuan-Neng | en_US |
dc.date.accessioned | 2017-04-21T06:49:50Z | - |
dc.date.available | 2017-04-21T06:49:50Z | - |
dc.date.issued | 2015 | en_US |
dc.identifier.isbn | 978-1-4799-9928-6 | en_US |
dc.identifier.issn | 1946-1550 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/136113 | - |
dc.description.abstract | Compare to the conventional structure, in this research, the structure of Cu pillar and tapered TSV for direct bonding has an excellent potential for low bonding temperature within a short bonding time. In addition, this scheme has the advantage of self-alignment ability. This paper focuses on the fabrication of taper-shape of through silicon via (TSV) and reports the quality and reliability investigation of bonding results. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Fabrication and Reliability Investigation of Copper Pillar and Tapered Through Silicon Via (TSV) for Direct Bonding in 3D Integration | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | PROCEEDINGS OF THE 22ND INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA 2015) | en_US |
dc.citation.spage | 439 | en_US |
dc.citation.epage | 442 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000380466200112 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |