標題: | A 98.6 mu W Acoustic Signal Processor for Fully-Implantable Cochlear Implants |
作者: | Liu, Hao-Min Lin, Yung-Jen Lee, Yu-Chi Lee, Cheng-Yen Yang, Chia-Hsiang 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2016 |
摘要: | This paper presents a low-power acoustic signal processor for fully-implantable cochlear implants. The developed processor supports adaptive beamforming, frequency-domain analysis, envelope detection, channel combination, and magnitude compression. Power and area are minimized by leveraging dedicated real-valued FFT, register count minimization, data allocation optimization, hardware complexity reduction, and minimum-energy-point operation. Compared to complexvalued FFT, real-valued FFT achieves 44.36% power reduction. Register count minimization and data allocation for FFT output reordering yields 28.07% and 27.09% area and power reduction, respectively. Envelope detection and log-compression are realized by hardware-efficient CORDIC engines. The processor is scalable to support various numbers of channels. This chip is implemented in 90-nm CMOS and the core area is 0.47 mm(2). It dissipates 98.6 mu W at 50 kHz, 0.33 V for a latency of 3 ms. |
URI: | http://hdl.handle.net/11536/136385 |
ISBN: | 978-1-4673-9498-7 |
期刊: | 2016 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT) |
顯示於類別: | 會議論文 |