A novel fully CMOS process compatible PREM for SOC applications

標題:	A novel fully CMOS process compatible PREM for SOC applications
作者:	Yeh, CC Wang, TH Tsai, WJ Lu, TC Liao, YY Zous, NK Chin, CY Chen, YR Chen, MS Ting, WC Lu, CY 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
關鍵字:	eraseless;multilevel cell (MLC);nonvolatile;multitime programming (MTP);progressive breakdown;programmable resistor with eraseless memory (PREM);system on chip (SOC)
公開日期:	1-三月-2005
摘要:	A novel nonvolatile memory cell named programmable resistor with eraseless memory (PREM) is proposed for system on chip applications for the first time. PREM combines a novel "eraseless" algorithm and the progressive breakdown of an ultrathin oxide. No or one extra mask is needed with a standard CMOS process. Multitime programming, multilevel cell, nonvolatility, and low-voltage operation are realized. Good reliability is demonstrated based on the result of a single cell.
URI:	http://dx.doi.org/10.1109/LED.2005.843221 http://hdl.handle.net/11536/13959
ISSN:	0741-3106
DOI:	10.1109/LED.2005.843221
期刊:	IEEE ELECTRON DEVICE LETTERS
Volume:	26
Issue:	3
起始頁:	203
結束頁:	204
顯示於類別：	期刊論文

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