用於製造可微縮噴墨印製微結構的剝離噴印製程

Abstract

本論文開發一種結合傳統黃光微影與噴墨印製的製程來實現可微縮尺寸的噴印銀結構，已經實現5-70 µm的銀線寬，在軟性的Kapton基板上燒結300 °C 30分鐘後有著約9.8 Ω•cm的電阻率。此外，運用剝離噴印製程在軟性Kapton基板上製作出線寬與線距10 µm的指叉電容及線寬10 µm、線距5 µm的螺旋方型電感，電容值與電感值分別是在10 kHz時有0.43 pF/mm^2及在100 kHz時有1.054 µH/mm^2，這些值在同樣面積下與直接噴印的電容與電感比較起來，有好幾倍的改善。剝離噴印製程可以顯著的減少傳統製程機器能源的需求及廢棄物的產生，結果表明，剝離噴印製程可以更促進噴墨印製微電子的應用。

This thesis presents a Lift-off Printing (LoP) process combining conventional photolithography and inkjet printing techniques is introduced to realize size-scalable printed silver microstructures with the line width ranging from 5 to 70 µm and the resistivity of ~9.8 µΩ∙cm on a flexible polyimide substrate via thermal-sintering at 300 °C for 30 min. In addition, a printed interdigitated capacitor with the electrode line width and spacing of 10 µm and a printed spiral square inductor with 10 µm line width and 5 µm spacing in an area of 1 mm^2 have been successfully demonstrated with an area capacitance and inductance of 0.43 pF/mm^2@10 kHz and 1.054 µH/mm^2 up to 100 kHz respectively, which are orders of magnitude performance improvement in comparison with the contemporary inkjet-printed capacitors and inductors. Owing to the significant reduction of energy demand in processing tools and waste generation in processing materials, the results have revealed that the LoP process can facilitate the advancement of printing manufacture technology for microelectronics applications.