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dc.contributor.authorHsieh, Shang-Hsunen_US
dc.contributor.authorChen, Ming-Jeren_US
dc.date.accessioned2019-04-03T06:44:26Z-
dc.date.available2019-04-03T06:44:26Z-
dc.date.issued2017-03-01en_US
dc.identifier.issn2168-6734en_US
dc.identifier.urihttp://dx.doi.org/10.1109/JEDS.2017.2656883en_US
dc.identifier.urihttp://hdl.handle.net/11536/145449-
dc.description.abstractOn the strained silicon metal-oxide-semiconductor field-effect transistors (MOSFETs), we show how to derive a formalism dealing with the scattering of a 2-D electron by a neutral defect. The corresponding neutral defect limited inversion-layer electron mobility, mu(n), is calculated in the momentum relaxation time approximation. The calculated results lead to a new analytical model: mu(n) = cN(n)(-1) where N-n is the neutral defect density per unit area and c is the coefficient independent of the inversion-layer density, the strain, and the temperature. The validity and applicability of the model are confirmed by citing three independent experiments on strained silicon MOSFETs undergoing different implantation sources and different annealing budgets. Importantly, this paper clarifies for the first time that strain will not change neutral defect limited mobility unless changing the neutral defect density. This reasonably explains the two experimental observations during implantation and annealing: 1) the implantation-induced strain relaxation in strained sample does not occur and 2) the neutral defect density is much higher in strained sample than in unstrained sample.en_US
dc.language.isoen_USen_US
dc.subjectInterstitialen_US
dc.subjectmetal-oxide-semiconductor field-effect transistors (MOSFETs)en_US
dc.subjectmobilityen_US
dc.subjectneutral defecten_US
dc.subjectscatteringen_US
dc.subjectstrainen_US
dc.titleA Model for Neutral Defect Limited Electron Mobility in Strained-Silicon Inversion Layersen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/JEDS.2017.2656883en_US
dc.identifier.journalIEEE JOURNAL OF THE ELECTRON DEVICES SOCIETYen_US
dc.citation.volume5en_US
dc.citation.issue2en_US
dc.citation.spage101en_US
dc.citation.epage106en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000400467500001en_US
dc.citation.woscount0en_US
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