完整後設資料紀錄
DC 欄位語言
dc.contributor.authorLee, Shih-Weien_US
dc.contributor.authorChang, Ching-Yunen_US
dc.contributor.authorChang, Geng-Mingen_US
dc.contributor.authorChen, Kuan-Nengen_US
dc.date.accessioned2019-04-03T06:44:30Z-
dc.date.available2019-04-03T06:44:30Z-
dc.date.issued2017-03-01en_US
dc.identifier.issn2168-6734en_US
dc.identifier.urihttp://dx.doi.org/10.1109/JEDS.2016.2645382en_US
dc.identifier.urihttp://hdl.handle.net/11536/145452-
dc.description.abstractA submicron-thick Cu/In bonding by using single sided heating approach has been successfully demonstrated on chip-to-wafer-level without antioxidant metal coating. The single sided heating approach can successfully prevent oxidation of Cu metal on the wafer during bonding. As compared with double sided heating method, a lower specific contact resistance can be obtained in single sided heating method. In addition, post-bonding annealing can further improve the bonding quality. Excellent electrical performances of reliability tests show a great potential for future highly dense interconnect.en_US
dc.language.isoen_USen_US
dc.subjectThree-dimensional integrationen_US
dc.subjectchip to wafer bondingen_US
dc.subjectsingle sided heating approachen_US
dc.titleFine-Feature Cu/In Interconnect Bonding Using Single Sided Heating and Chip-to-Wafer Bonding Technologyen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/JEDS.2016.2645382en_US
dc.identifier.journalIEEE JOURNAL OF THE ELECTRON DEVICES SOCIETYen_US
dc.citation.volume5en_US
dc.citation.issue2en_US
dc.citation.spage128en_US
dc.citation.epage131en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000400467500006en_US
dc.citation.woscount1en_US
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