標題: Comprehensive Analysis on Electrical Characteristics of Pi-Gate Poly-Si Junctionless FETs
作者: Hsieh, Dong-Ru
Lin, Jer-Yi
Kuo, Po-Yi
Chao, Tien-Sheng
電子物理學系
光電工程學系
Department of Electrophysics
Department of Photonics
關鍵字: Carrier mobility;channel dimension;crystallinity;effective carrier concentration;junctionless (JL);multifunctional 3-D ICs;Pi-gate (PG);poly-Si
公開日期: 1-Jul-2017
摘要: In this paper, the electrical characteristics of the Pi-gate junctionless FETs (PG JL FETs) with the in situ n(+) doped poly-Si (DP-Si) fin-channels have been experimentally investigated and comprehensively discussed. The subthreshold behavior and threshold voltage of the PG JL FETs are sensitive to the channel dimensions, especially the channel width. The crystallinity, carrier mobility, and effective carrier concentration in the DP-Si films are dependent on the initial DP-Si film thicknesses, which directly influence the on current and threshold voltage of the PG JL FETs. Based on an evaluation on the subthreshold behavior and the driving current, we found that the PG JL FETs with the low/high aspect ratio (A.R. = channel thickness/channel width) are separately suitable for the low-power/high-performance applications. Among these PG JL FETs, the device with a proper A.R. (3.35) exhibits a relatively steep subthreshold swing (S.S.) of 66 mV/decade and the highest (ON)/(OFF) currents ratio (I-ON/I-OFF) of 1.2 x 10(8) (VD = 1 V). These devices are very promising candidates for future multifunctional 3-D integrated circuit applications.
URI: http://dx.doi.org/10.1109/TED.2017.2704933
http://hdl.handle.net/11536/145640
ISSN: 0018-9383
DOI: 10.1109/TED.2017.2704933
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 64
起始頁: 2992
結束頁: 2998
Appears in Collections:Articles