完整後設資料紀錄
DC 欄位語言
dc.contributor.authorLu, Tsung-Cheen_US
dc.contributor.authorVan, Lan-Daen_US
dc.contributor.authorLin, Chi-Shengen_US
dc.contributor.authorHuang, Chun-Mingen_US
dc.date.accessioned2014-12-08T15:20:29Z-
dc.date.available2014-12-08T15:20:29Z-
dc.date.issued2011en_US
dc.identifier.isbn978-1-4577-0223-5en_US
dc.identifier.urihttp://hdl.handle.net/11536/14571-
dc.description.abstractA low-FOM SAR ADC using the leakage reduction bootstrapped switch (LRBS) to achieve a satisfactory ENOB and using a low-power approach with a low voltage, low sampling rate, and low-DAC-capacitance structure is presented for biomedical applications. LRBS is proposed to alleviate the leakage caused by the low-power approach to increase SNDR and ENOB. From the measurement results, the 0.18 mu m CMOS prototype chip with the total DAC capacitance of 2.765pF consumes 2.5nW and achieves a SNDR of 53.05dB under a 0.5V supply voltage at 1KS/s with a Nyquist input. The resulting FOM is 6.8fJ/conversion-step.en_US
dc.language.isoen_USen_US
dc.titleA 0.5V 1KS/s 2.5nW 8.52-ENOB 6.8fJ/Conversion-Step SAR ADC for Biomedical Applicationsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2011 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC)en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000296981700042-
顯示於類別:會議論文